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Hardware Implementation of Pairings
Maurice Keller, Robert Ronan, Andrew Byrne, Colin Murphy, William Marnane
207 - 225
10.3233/978-1-58603-947-9-207
Chapter XIII
Cryptology and Information Security Series
Volume 2: Identity-Based Cryptography
Abstract

In this chapter the efficient hardware implementation of pairings is considered. For each of the three fields , and suitable curves, pairing algorithms and field arithmetic architectures are presented. An example architecture for computing the ηT pairing in characteristic 2 or 3 is presented and its implementation results on a Xilinx FPGA considered. Finally the implementation results of several pairing architectures from the literature are discussed.

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