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Communicating Process Architecture for Multicores
David May
21 - 32
Concurrent Systems Engineering Series
Volume 65: Communicating Process Architectures 2007
Abstract

Communicating process architecture can be used to build efficient multicore chips scaling to hundreds of processors. Concurrent processing, communications and input-output are supported directly by the instruction set of the cores and by the protocol used in the on-chip interconnect. Concurrent programs are compiled directly to the chip exploiting novel compiler optimisations. The architecture supports a variety of programming techniques, ranging from statically configured process networks to dynamic reconfiguration and mobile processes.

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