In some quarters, received wisdom about hard real-time systems (where lateness in response means system failure) is that a currently running process must be pre-empted by a higher priority process that becomes runnable (e.g. by the assertion of an external event pin or timeout) – otherwise worst-case response times cannot be guaranteed. Further, if a higher priority process needs to synchronise with one of lower priority, the latter must automatically inherit the priority of the former. Otherwise, the higher process effectively inherits the priority of the lower one as it waits for the latter to be scheduled (priority inversion) and, again, worst-case response times fail.
The CCSP multicore scheduler [1] for occam-π, part of the KRoC package [2], is possibly the fastest and most scalable (with respect to processor cores) such beast on the planet. However, its scheduling is cooperative (not pre-emptive) and it does not implement priority inheritance (and cannot do this given the nature of CSP synchronisation, where processes are unaware of the other processes involved). Therefore, despite its performance, received wisdom would seem to rule it out for hard real-time applications.
This talk reviews a paper, [3], from the OUG-7 proceedings (1987) that discusses these ideas with respect to Transputers. One minor improvement to the reported techniques will be described. Otherwise, no change is needed for modern multicore architectures. Conclusions are that (a) pre-emptive scheduling is not required to meet deadlines, (b) priority inversion is a design error (dealt with by correct design, not the run-time system) and (c) the occam-π/CCSP scheduler can be made to work even more efficiently for hard real-time systems than it presently does for soft real-time (such as complex system modelling). Slides used in the presentation can be downloaded from [4].